Pc hardware1 | Computer Science homework help

1. Gabe and Ashley are discussing access time. Gabe says access time is the time it takes to write to or read
from a memory location. Ashley says access time is the delay from the time the memory chip is given an
address to the time when the data is available at the data lines. Who is correct?
A. Only Ashley
B. Neither
C. Both
D. Only Gabe
2. _______ cache memory is designed inside the CPU.
A. Racing
B. RAM
C. L2.
D. L1
3. How is the SIMM an improvement on the SIPPs and DIPs that preceded it?
A. SIMMs are larger and thus hold more memory.
B. The SIMM allows you to remove and upgrade a bank (module) of memory.
C. The SIMM is soldered to the system board.
D. Every SIMM houses a row of pins on each side.
4. 0100111, 10101010, and 111000110 are what type of numbers?
A. Binary
B. Ternary
C. Clock
D. Processor
5. Which of the following modules requires the most voltage to run?
A. DDR1
B. DDR
C. DDR3
D. DDR2
6. Access time for memory modules is measured in what unit of time?
A. Nanoseconds
B. Femtoseconds
C. Attoseconds
D. Milliseconds
7. Two technicians are discussing PROM. Technician A says that PROM chips are expensive and
formatted with a device called a memorizer. Technician B says that PROM memory addresses are not
arranged in rows and columns. Which technician is correct?
A. Only Technician A
B. Both
C. Only Technician B
D. Neither
8. Which of the following analogies best describes the relationship between RAM and its ability to store
data?
A. Bucket with a hole in it
B. Open telephone line
C. Large bank vault with a complex combination
D. Black box with an input and output
9. If buying memory for a notebook computer, what type of module should you most likely purchase?
A. RIMM
B. SIMM
C. DIMM
D. SO-DIMM
10. If you’re required to install memory in pairs for the system to work, what type of memory module are
you most likely using?
A. SIPP
B. DIPP
C. DIMM
D. SIMM
11. A chip that allows the BIOS to be upgraded without removing it from the motherboard is a/an
A. ROM.
B. SDRAM.
C. EEPROM.
D. CMOS.
12. The cache uses a/an _______ method to anticipate what the CPU will need next.
A. best-guess
B. random
C. worst-case
D. algorithmic
13. What is the advantage of paging?
A. It increases speed by accessing memory in chunks.
B. Paging is assigning memory addresses and is done every time the system is booted.
C. Each page of a document is stored in one file table.
D. It allows faster mapping during the boot process.
14. How does memory cache speed up computer processing?
A. Cache memory doesn’t need to be refreshed, so access time is faster.
B. Cache memory does auto-defragmenting, so access time is faster.
C. Cache memory refreshes instantly, so access time is faster.
D. Cache memory uses more buffer space, so access time is faster.
15. Cache memory uses which of the following?
A. ROM
B. SRAM
C. DRAM
D. EDO
16. Two technicians are discussing the interface between system memory and the motherboard. Technician
A says data errors caused by speed mismatches are handled by making the memory run a parity check for
every bit accessed. Technician B says those speed mismatch errors are avoided by building time delays into
the motherboard to allow the system to catch up to the memory. Which technician is correct?
A. Neither
B. Both
C. Only Technician A
D. Only Technician B
17. Your computer at work is running a 32-bit version of Windows XP. What is the approximate limit of
RAM your machine can effectively use?
A. 4 GB
B. 8 GB
C. 2 GB
D. 1 GB
18. What is a clock rate?
A. Maximum transfer rate to L2 cache
B. Oscillator on the board usually measured in MHz
C. Cursor flashing speed
D. The speed at which a hard disk spins
End of exam
19. If you need to erase the data on a specialized memory chip, and it requires ultraviolet light to do so,
what type of chip should be used?
A. PROM
B. EEPROM
C. EPROM
D. ROM
20. The system board receives important information from DIMMs regarding the RAM configuration
during
A. pipelining.
B. serial presence detect (SPD).
C. error checking and correcting (ECC).
D. parity.